Sunday, March 22, 2015

Expanded Structure of IAS Computer

Expanded structure of IAS computer
Fig:-Expanded structure of IAS computer

 

1. Memory buffer register (MBR):-

                          Contains a word to be stored in memory or sent to the I/O unit,it is used to receive a word from memory or from the I/O unit.

2. Memory address Register (MAR):-

                           Specifies the address of memory in the word to be written from or read into the MBR.

3. Instruction register (IR):- 

                           Contains the 8bit Op-code instruction being executed.

4. Instruction buffer register (IBR):-

                            Employed to hold temporarily the right-hand instruction from a word in memory.

5. Program counter (PC):-

                            Contains the address of the next instruction-pair to be fetched from memory.

6. Accumulator(AC) and multiplier quotient(MQ):-

                             Employed to hold  temporarily operands and results of ALU operations.For example,the result of multiplying two 40-bits numbers is an 80bit number,the most significant 40 bits are stored in the AC and the least significant in the MQ.

7. Central processing unit(CPU):-

 

                             Controls the operation of the computer and performs its data processing functions,often simply referred to as processor.

8. Input/Output

                                Moves data between the computer and its external environment.

                              

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